CHAMP-FX2 6U VPX Virtex-5, 8641D
FPGAモジュール / OpenVPX
・6U VPX-REDI ・Two Xilinx Virtex-5 Platform FPGAs (LX110T or LX220T) ・512 Mbytes or 1 GB DDR2 SDRAM per FPGA in two banks (1-2 Gbyte total on-board), 4.4 GBytes/sec peak bandwidth per FPGA ・36 Mbytes QDR-II+ SRAM per FPGA in four banks (72 Mbytes total on-board), 8.8 GBytes/sec peak bandwidth per FPGA ・4-lane RocketIO connection between the two FPGA…
AMC520
FPGAモジュール / AdvancedMC
・Double width per μTCA.4 ・Ten channel of ADC with 125MSPS @ 16-bit resolution utilizing AD9268 device ・Dual 1GbE via SFP ・Dual DAC with 250 MSPS @ 16-bit resolution utilizing MAX5878 ・Internal clock or precision external clock from either RTM or back plane clocks ・Trig in/out configurable by software (external trigger via front, RTM or port 17) ・PC…
FPE650 6U VPX Quad Virtex-5
FPGAモジュール / OpenVPX
・x4 Xilinx Virtex-5 FPGAs (SX95T) ・Dual FPGA mezzanine card (FMC/VITA 57) sites ・Multiple banks of FPGA connected QDR SRAM and DDR SDRAM memory ・6U VPX form factor ・FusionXF FPGA Design Kit
TS-PMC-4001
FPGAモジュール / PMC/XMC
・Available as bundled I/O, hardware and software development kit ・Micro-mezzanine I/O board allows for standard configuration and customization of I/O signals ・4 MBytes SRAM, 256 MBytes SDRAM, 64/66 MHz PCI interface ・Altera Stratix EP1S40-C5 FPGA delivers superior processing performance ・TS-PMC A40 FPGA PMC processor
RCNIC-A2PAX
FPGAモジュール / PCI Express
・SDK includes high-level AFDX API, low-level (raw frame-based) CPCAP API, and .NET integration libraries at no additional charge ・PCI card (PMC on carrier) for AFDX/ARINC 664 Part 7 support ・Two independent 10/100 MHz full duplex ports
FPE650 6U VPX Quad Virtex-5
FPGAモジュール / OpenVPX
・x4 Xilinx Virtex-5 FPGAs (SX95T) ・Dual FPGA mezzanine card (FMC/VITA 57) sites ・Multiple banks of FPGA connected QDR SRAM and DDR SDRAM memory ・6U VPX form factor ・FusionXF FPGA Design Kit
FMC223
FPGAモジュール / FMC
・FPGA Mezzanine Card (FMC) per VITA-57 ・Single width ・Single DAC 14-bit at 2.5 GSPS ・2Vpp Differential Analog Output Swing ・Programmable DSP Clock ・Multi I/O LVDS input for Trig input, user defined, clock input, etc.
AMC532
FPGAモジュール / AdvancedMC
・AMC FPGA based on Altera Stratix-V (5SGXEA) in F1932 package ・Single module, mid-size or full-size ・VITA 57.1 FMC HPC Connector (compatible with LPC) ・All FMC LA, HA, HB pairs routed bi-directionally
XMC-FPGA05D Virtex-5 XMC/PMC
FPGAモジュール / PMC/XMC
・Xilinx Virtex-5 SX95T (default) FPGA ・Customizable digital I/O ・Two banks of 9MB QDR2 SRAM for DSP ・Two banks of 128MB DDR2 SDRAM for large buffers ・PCIe/PCI-X interface ・Windows, VxWorks and Linux support ・FusionXF FPGA Design Kit support ・Air and Conduction cooled variants
AMC517
FPGAモジュール / AdvancedMC
・AMC FPGA carrier for FMC per VITA-57 ・Xilinx Kintex-7 410T FPGA ・AMC Ports 4-7 and 8-11 are routed to FPGA per AMC.1, AMC.2 and AMC.4 ・Option for on-board Freescale QorIQ PPC2040 with DDR3 ・FPGA can load via FLASH or via the P2040 ・On-board clock and jitter cleaner ・FPGA FLASH can be programmed ・Serial over LAN (SOL) with hardware RNG