MZ523A – Mezzanine for MRT523, 12 Channel Variable Gain
FPGAモジュール / AdvancedMC
・Mezzanine module for MRT523 ・Routes 12 analog inputs from rear panel SSMC to mezzanine connector ・Per channel AC/DC selection and programmable gain ・Clock, trigger, user I/O routed from rear panel DensiShield to mezzanine connectors ・RoHS compliant
AMC573(Xilinx Zynq® UltraScale+ RFSoC FPGA, AMC)
FPGAモジュール / AdvancedMC
Xilinx Zynq® UltraScale+ RFSoC XCZU28DR FPGA 8 ADC/DAC to the front 8 GB of 64-bit wide DDR4 Memory (single bank) with ECC to CPU 8 GB of 64-bit wide DDR4 Memory (single bank to Fabric)
AMC531 – Altera EP4S100Gx AMC FPGA
FPGAモジュール / FMC
・FPGA based on the Altera Stratix IV EP4S100Gx in 1517 package ・Single module, mid-size (full-size also available) ・AMC Ports 4-11 are routed to FPGA (protocols such as PCIe, SRIO, XAUI, etc. are FPGA programmable) ・On-board Freescale QorIQ PPC2040 (Quad Core Processor) ・Ports 2 and 3 as SATA to P2040 ・Ports 0 and 1 are Muxed with P2040 GbE ・AMC FC…
CHAMP-FX2/VPX6-470 – 6U VPX Xilinx Virtex-5 and NXP MPC8641D Digital Signal Processor Card
FPGAモジュール / VPX
・6U VPX-REDI ・Two Xilinx Virtex-5 Platform FPGAs (LX110T or LX220T) ・512 Mbytes or 1 GB DDR2 SDRAM per FPGA in two banks (1-2 Gbyte total on-board), 4.4 GBytes/sec peak bandwidth per FPGA ・36 Mbytes QDR-II+ SRAM per FPGA in four banks (72 Mbytes total on-board), 8.8 GBytes/sec peak bandwidth per FPGA ・4-lane RocketIO connection between the two FPGA…
FMC225 – FMC ADC, 12-bit @ 4.0 GSPS and DAC, 14-bit @ 5.7 GSPS
FPGAモジュール / FMC
・FPGA Mezzanine Card (FMC) per VITA 57 ・TI ADC12J4000 ADC ・Usable output bandwidth of 800 MHz at 4x decimation and 4000 MSPS ・Usable output bandwidth of 100 MHz at 32x decimation and 4000 MSPS ・Bypass Mode for full Nyquist output bandwidth ・Analog Devices AD9129 DAC ・DC-to-1.4 GHz in Baseb and mode ・DC-to-1.0 GHz in 2x Interpolation mode …
FMC250 – FMC Dual ADC 12-bit 2.6 GSPS, Single DAC 16-bit 12 GSPS
FPGAモジュール / FMC
・Dual AD9625 ADC 12-bit at 2.6/2.5/2.0 GSPS ・8 JESD204B lanes from each ADC is routed to the FMC+ connector ・Single DAC AD9164/AD9162 16-bit 12 GSPS ・FPGA Mezzanine Card (FMC+) per VITA 57.4 ・Excellent dynamic performance ・Front panel interface includes CLK In, Trig In and Trig Out
AMC525 – AMC FPGA Carrier for Dual FMC with Virtex-7
FPGAモジュール / FMC
AMC FPGA carrier for Dual FPGA Mezzanine Card (FMC) per VITA-5 ・Xilinx Virtex-7 690T FPGA in FFG-1761 package ・Double module, mid-size (full-size optional) ・AMC Ports 4-11 are routed to FPGA per AMC.1, AMC.2 and AMC.4 (protocols such as PCIe, SRIO, XAUI, etc. are FPGA programmable) ・AMC FCLKA, TCLKA, TCLKB, TCLKC and TCLKD are routed ・Clock jitter …
MZ523B – Mezzanine for MRT523, 12 Channel Variable Gain
FPGAモジュール / AdvancedMC
・Mezzanine module for MRT523 ・Routes 12 analog inputs and all clock, trigger, user I/O from rear panel to mezzanine connectors ・Direct connection on all analog channels, giving full performance of the ADC ・RoHS compliant
AMC524 – Quad ADC, 16-bit @ 125 MSPS, Dual DAC, Artix-7
FPGAモジュール / µTCA
・Single module, mid-size per AMC.0 ・Conduction cooled version available ・Dual DAC 12-bit @ 2.5 GSPS (DDS AD9915) ・Quad ADC 16-bit @ 125 MSPS (AD9653) ・Artix-7 FPGA with dual banks of DDR-3, 2 GB total ・Internal, external or backplane clock with on-board wide-band PLL ・AMC Ports 4-7 and 8-11 are routed to FPGA per AMC.1, AMC.2 and AMC.4 (PCIe, SRIO,…
XF07-516 – Quad 250MSPS 16b Kintex-7 Digital Receiver XMC
FPGAモジュール / PMC/XMC
・4x 250MSPS 16-bit analog input (MMCX) ・Trigger in/trigger out (MMCX) ・80-250MHz external sample clock input (MMCX) ・Onboard programmable sample clock generator ・User programmable Xilinx Kintex-7 K325T (-2) FPGA ・PMC P14 digital IO: 32-differential digital IO pairs (LVDS+RS485) ・XMC P16 digital IO: 20 differential pairs + 38 single ended digital (L…