製造中止製品(EOL)
・Available in 1, 2 or 4 channel versions with or without DDCs
・Up to 105 MHz simultaneous sampling of all channels
・Internal or external clock and trigger
・> 72 dB signal-to-noise ratio
・> 85 dB spurious free dynamic range
・1 MByte onboard memory storage
・User programmable 3 million gate Xilinx FPGA
・Uncommitted Pn4 user I/O PMC interface
・Sensor Processing Resource Center
・Up to 105 MHz simultaneous sampling of all channels
・Internal or external clock and trigger
・> 72 dB signal-to-noise ratio
・> 85 dB spurious free dynamic range
・1 MByte onboard memory storage
・User programmable 3 million gate Xilinx FPGA
・Uncommitted Pn4 user I/O PMC interface
・Sensor Processing Resource Center
