・Dual AD9625 ADC 12-bit at 2.6/2.5/2.0 GSPS
・8 JESD204B lanes from each ADC is routed to the FMC+ connector
・Single DAC AD9164/AD9162 16-bit 12 GSPS
・FPGA Mezzanine Card (FMC+) per VITA 57.4
・Excellent dynamic performance
・Front panel interface includes CLK In, Trig In and Trig Out
・8 JESD204B lanes from each ADC is routed to the FMC+ connector
・Single DAC AD9164/AD9162 16-bit 12 GSPS
・FPGA Mezzanine Card (FMC+) per VITA 57.4
・Excellent dynamic performance
・Front panel interface includes CLK In, Trig In and Trig Out
