8 Single-ended or 3-Wire Differential 18-Bit Analog Output Channels
Simultaneous Clocking; Individual R-2R 18-Bit DAC per output channel
DC to 500KSPS Sample Rate per Channel; 0-4 MSPS aggregate rate
Output ranges: ±10V, ±5V, ±2.5V
Independent 256K-sample output FIFO Buffer
8 Bidirectional Digital I/O lines; TTL compatible
Internal Sample Rate Generator with 24-Bit rate divider
Hardware Sync and Clock I/O for Multiboard Synchronization; Front-panel and Internal access
Conforms to PCl Bus Specification, Revision 2.3, 66/33 MHz with Universal Signaling
Standard Single-width PMC Form factor
DMA Engine Supports Block-Mode Transfers in Two Channels
On-demand Autocalibration
Integrated DC/DC Conversion and Dual Regulation for Internal Supply Voltages
Simultaneous Clocking; Individual R-2R 18-Bit DAC per output channel
DC to 500KSPS Sample Rate per Channel; 0-4 MSPS aggregate rate
Output ranges: ±10V, ±5V, ±2.5V
Independent 256K-sample output FIFO Buffer
8 Bidirectional Digital I/O lines; TTL compatible
Internal Sample Rate Generator with 24-Bit rate divider
Hardware Sync and Clock I/O for Multiboard Synchronization; Front-panel and Internal access
Conforms to PCl Bus Specification, Revision 2.3, 66/33 MHz with Universal Signaling
Standard Single-width PMC Form factor
DMA Engine Supports Block-Mode Transfers in Two Channels
On-demand Autocalibration
Integrated DC/DC Conversion and Dual Regulation for Internal Supply Voltages
