64 Analog Inputs with Dedicated 500KSPS 18-Bit SAR ADC per Channel
Simultaneous Sampling of all Inputs; Minimum Data Skew
Sampling Rates to 500 KSPS per Channel (32 MSPS Aggregate Rate)
D32; 66MHz, 33MHz PCI compatibility, with universal 5V/3.3V Signaling
Continuous, Burst and Single-Sample Clocking Modes
Software and I/O pinout compatibility with the 16AI64SSA/C
Selectable Differential Processing Simulates Differential Operation of Channel Pairs
Input Ranges: ±10V, ±5V, 0/+5V, 0/+10V; Software-Selectable
Hardware Sync I/O for Multiboard Operation
1 MByte FIFO Data Buffer provides 256K-Sample data capacity
2-Channel DMA Engine
Sampling Controlled by Internal Rate Generator, by Direct software control, or Externally
On-Demand Internal Autocalibration of all Channels
Completely Software-Configurable; No Field Jumpers
Auxiliary PXI Triggering Port Available through P1, P2.
Simultaneous Sampling of all Inputs; Minimum Data Skew
Sampling Rates to 500 KSPS per Channel (32 MSPS Aggregate Rate)
D32; 66MHz, 33MHz PCI compatibility, with universal 5V/3.3V Signaling
Continuous, Burst and Single-Sample Clocking Modes
Software and I/O pinout compatibility with the 16AI64SSA/C
Selectable Differential Processing Simulates Differential Operation of Channel Pairs
Input Ranges: ±10V, ±5V, 0/+5V, 0/+10V; Software-Selectable
Hardware Sync I/O for Multiboard Operation
1 MByte FIFO Data Buffer provides 256K-Sample data capacity
2-Channel DMA Engine
Sampling Controlled by Internal Rate Generator, by Direct software control, or Externally
On-Demand Internal Autocalibration of all Channels
Completely Software-Configurable; No Field Jumpers
Auxiliary PXI Triggering Port Available through P1, P2.
