Analog Inputs:
Two Differential Analog Inputs with dedicated 16-Bit ADC per channel
True Simultaneous Sampling of all inputs to 2.0 MSPS per channel
SAR Architecture; No minimum sample rate
Analog Outputs:
Two Single-Ended Analog Outputs with dedicated 16-Bit DAC per channel
Simultaneous Output clocking rates to 2.0 MSPS per channel
Selectable Direct-Write or FIFO-Buffered access
Outputs-Disconnect feature ensures quiet, zeroed outputs during power-up and autocalibration
Buffer Configurable as Open for data streaming, or Circular for periodic functions
Common Analog I/O Features:
Selectable Input/Output Ranges: ±10V, ±5V, ±2.5V
Independent 2.0 Megasample input and output FIFO data buffers
Hardware Clock and Sync I/O for multiboard operation
Timing Controlled by internal rate generator, by software clocking, or externally
8-Bit Buffered TTL Digital Output Port:
Eight TTL digital output channels
8x256K-sample data FIFO
Clocking rates from Zero to 2MHz; Internal or external clock source
General:
8-Bit Bidirectional TTL digital I/O port
DMA Engine minimizes bus congestion
Internal Power Conversion; Single 5-Volt power requirement
Independent 24-Bit frequency dividers
Internal Autocalibration
66 MHz 32-Bit PCI Support, with universal 5V/3.3V signaling
Single-Width PMC form factor with integral EMI shield
Extended-temperature version available
Two Differential Analog Inputs with dedicated 16-Bit ADC per channel
True Simultaneous Sampling of all inputs to 2.0 MSPS per channel
SAR Architecture; No minimum sample rate
Analog Outputs:
Two Single-Ended Analog Outputs with dedicated 16-Bit DAC per channel
Simultaneous Output clocking rates to 2.0 MSPS per channel
Selectable Direct-Write or FIFO-Buffered access
Outputs-Disconnect feature ensures quiet, zeroed outputs during power-up and autocalibration
Buffer Configurable as Open for data streaming, or Circular for periodic functions
Common Analog I/O Features:
Selectable Input/Output Ranges: ±10V, ±5V, ±2.5V
Independent 2.0 Megasample input and output FIFO data buffers
Hardware Clock and Sync I/O for multiboard operation
Timing Controlled by internal rate generator, by software clocking, or externally
8-Bit Buffered TTL Digital Output Port:
Eight TTL digital output channels
8x256K-sample data FIFO
Clocking rates from Zero to 2MHz; Internal or external clock source
General:
8-Bit Bidirectional TTL digital I/O port
DMA Engine minimizes bus congestion
Internal Power Conversion; Single 5-Volt power requirement
Independent 24-Bit frequency dividers
Internal Autocalibration
66 MHz 32-Bit PCI Support, with universal 5V/3.3V signaling
Single-Width PMC form factor with integral EMI shield
Extended-temperature version available
