One user-programmable Xilinx Virtex-6 FPGA node (LX240T) with:
One bank of 300 MHz DDR2 SDRAM (256 MB), up to 2.4 Gbytes/s peak bandwidth
Two banks of 300 MHz QDR SRAM (36 MB total), up to 4.8 GBytes/s peak bandwidth
One dual-core NXP Power Architecture MPC8640 Power Architecture @ 1 GHz
XMC mezzanine site
Continuum FXtools developer's kit offers FPGA design kit and Continuum firmware and BSP for VxWorks and Linux
Conduction-cooled L200 version
One bank of 300 MHz DDR2 SDRAM (256 MB), up to 2.4 Gbytes/s peak bandwidth
Two banks of 300 MHz QDR SRAM (36 MB total), up to 4.8 GBytes/s peak bandwidth
One dual-core NXP Power Architecture MPC8640 Power Architecture @ 1 GHz
XMC mezzanine site
Continuum FXtools developer's kit offers FPGA design kit and Continuum firmware and BSP for VxWorks and Linux
Conduction-cooled L200 version
