Eight 16-Bit 0-20mA or 4-20mA scanned analog input channels, Software-configurable also as unipolar voltage inputs; 16 single-ended or eight differential, scaled as 0 to +10V, 0 to-+5V or 0 to +2.5V.
Four 16-Bit current-loop output channels, configurable as 0-20mA or 4-20mA ranges, driven by four voltage-output DACs scaled as 0 to +10V, 0 to +5V or 0 to +2.5V. Both the current-loop outputs and the outputs of the voltage-DACs are available at the system I/O connector.
Current-loop outputs have -15V to +11V compliance using internal supplies, or Zero to +31V compliance using an external +34V loop supply
Independent 32K-sample analog input and output FIFO buffers
300K samples per second aggregate analog input sample rate ( 37 KSPS per channel for 8 active channels)
300K samples per second per channel analog output clocking rate (1200 KSPS aggregate rate)
Multiple-channel and single-channel input scanning modes
Buffer amplifiers on all analog input lines
Supports waveform and arbitrary function generation, with continuous and one-shot modes
16-Bit bi-directional TTL digital port
Internal rate generator controls input sampling, output sampling, or both simultaneously
Supports multiboard synchronization of analog inputs and outputs
Internal autocalibration of analog input and output channels
Continuous and triggered-burst (one-shot) input and output Modes
DMA engine minimizes host I/O overhead
68-Pin SCSI system I/O connector with metal shell
66MHz PCI support where applicable, with universal 5V/3.3V signaling
Four 16-Bit current-loop output channels, configurable as 0-20mA or 4-20mA ranges, driven by four voltage-output DACs scaled as 0 to +10V, 0 to +5V or 0 to +2.5V. Both the current-loop outputs and the outputs of the voltage-DACs are available at the system I/O connector.
Current-loop outputs have -15V to +11V compliance using internal supplies, or Zero to +31V compliance using an external +34V loop supply
Independent 32K-sample analog input and output FIFO buffers
300K samples per second aggregate analog input sample rate ( 37 KSPS per channel for 8 active channels)
300K samples per second per channel analog output clocking rate (1200 KSPS aggregate rate)
Multiple-channel and single-channel input scanning modes
Buffer amplifiers on all analog input lines
Supports waveform and arbitrary function generation, with continuous and one-shot modes
16-Bit bi-directional TTL digital port
Internal rate generator controls input sampling, output sampling, or both simultaneously
Supports multiboard synchronization of analog inputs and outputs
Internal autocalibration of analog input and output channels
Continuous and triggered-burst (one-shot) input and output Modes
DMA engine minimizes host I/O overhead
68-Pin SCSI system I/O connector with metal shell
66MHz PCI support where applicable, with universal 5V/3.3V signaling
