・Single module, mid-size per AMC.0
・Conduction cooled version available
・Dual DAC 12-bit @ 2.5 GSPS (DDS AD9915)
・Quad ADC 16-bit @ 125 MSPS (AD9653)
・Artix-7 FPGA with dual banks of DDR-3, 2 GB total
・Internal, external or backplane clock with on-board wide-band PLL
・AMC Ports 4-7 and 8-11 are routed to FPGA per AMC.1, AMC.2 and AMC.4 (PCIe, SRIO, XAUI, etc. are FPGA programmable)
・IPMI 2.0 compliant
・Conduction cooled version available
・Dual DAC 12-bit @ 2.5 GSPS (DDS AD9915)
・Quad ADC 16-bit @ 125 MSPS (AD9653)
・Artix-7 FPGA with dual banks of DDR-3, 2 GB total
・Internal, external or backplane clock with on-board wide-band PLL
・AMC Ports 4-7 and 8-11 are routed to FPGA per AMC.1, AMC.2 and AMC.4 (PCIe, SRIO, XAUI, etc. are FPGA programmable)
・IPMI 2.0 compliant
